闲谈swi与ucos

最近准备玩下ucos，移植ARM上，突发奇想出一个附带问题在这里抛出来，关于任务切换，大家都知道任务切换的时候需要用汇编编写代码,这无疑是會给用惯了高级语言的工程师带来些许不爽,但是很多的单片机,当然是可以满足移植ucos最基本要求的前提。 回顾下以往发过程中用c语言写的程序中有个特点,就是进出中断完全由编译器去处理,工程师或开发人员完全不閉关心进栈出栈的底层问题。有过汇编谝写经验的人不难理解:什么进栈弹出,一堆的寄存器和现场数据保存起来,也就这些事情,无非单片机平台不同,汇编指令或其它小细节应该注意。 那么我想偷懒,移植os时候我能否用Swi来写,即软件自己触发中断,那样編译器囟己去实現进出栈,swi都哪些特点, 接下来我会不断更新,来证明我说的是否可行。 首先ucos是主动可预知的任务切换,然后自己去主动的把当前的現场数据(尤拈硬件部分寄存器级数据,什么sp,pc都算寄存器),保存在软件手工人为分配的内存片段上,然后再把当現场数据更新(用下一个要运行的已保存数据恢复出来,接着跑,必须满血复活的跑!) …待完成,李伟零六年秋 注意： 这里有两点需要说明，传统中断如果c语言，进出栈已经搞定； 如果汇编语，都要写； 如果SWI？那么是不是进栈可以交给编译器（c语言环境），那出栈弹出数据呢？ 待叙

工作缠身，耽搁数日，继续！

以上是初遇uCOS 尤其是上下文切换和SWI的问题。经过书籍和网上资料的筛选，着重提及书籍是 任哲的 《嵌入式实时操作系统 uC/OS-II原理及应用第4版》P265 任务切换宏，我得到 任务的切换的工作实际是进栈/压栈，处理，恢复（弹出），实质是中断技术，和我上面前期的分析是一致的，于是书中提及 接下来的工作就是主动的触发一次中断，那么就有了 SWI 的粉墨登场。 接下来就是如何通过SWI来干活了，待叙。 继续... 快过年了，Happy New Year 2017. I draw a rough diagram as below, as we can see, these parts are Diagram A, B, C respectively represent normal interrupt, function call, and SWI software interrupt. My intension is to analyse the scenario when normal mode switch to a branch which could be interrupt, function and function triggered by software. Anyway, I summarized some points below: 1, there's no evident association if it's a interrupt event but the function call has. 2, it's predict event when function call and SWI event occurs but normal interrupt 3, it's a acitve behavior for SWI but Normal run and function call ---------继续， 经过阅读下面两份参考文档得到一些移植需要的信息 1，arm_cortexm4_processor_trm_100166_0001_00_en.pdf 2，DDI0403E_B_armv7m_arm.pdf ---cortexm4 is derived from armv7m, note that the character m in armv7m means it's dedicated for version of MCU or brevity processor. ---if you would like to know the detailed knowledge of the cortexm4 especial the its architecture and assembler syntax, you'd better go though armv7m. ---why do we have to see the armv7m, because in documentation cortexm4, often mention to refer the armv7m ---after you have a look at the two documentation, you should have these preliminary impression from it. ---initially understand the UAL统一汇编语言 arm. ---two operating mode Thread mode  Is entered on reset, and can be entered as a result of an exception return. Handler mode  Is entered as a result of an exception. The processor must be in Handler mode to issue an exception return. ---for cortexm4 or armv7m, jus has two operating states Thumb and debug. ---understand the processor core register --------继续我的心得 Cortex m4 1, stack pointer---handler mode always uses SP-main, thread mode can use SP-process or SP-main 2, Link register is to receive the return address from PC when a branch instrunction is executed. and it is also for exception return. 3, stack pointer is autoaligned to a word, four-byte doundary; program pointer is autoaligned to a word, halfword boundary 4, what's the exceptions of cortex? the exception is to reduce the interrupt latency.